Pontedera, March 13, 2007

Evidence S.r.l. is proud to invite you to the SAE World Congress in Detroit (USA) to attend the following presentation:

Wednesday, April 18, 10:30 a.m

Session: System Level Architecture Design Tools and Methods (Part 1 of 2) .Session Code: AE10. Room D3-20/21

Adding Timing Analysis to Functional Design to Predict Implementation Errors

Paolo Gai, Giuseppe Lipari, Marco Di Natale, Nicola Serreli, Luigi Palopoli, Alberto Ferrari

ABSTRACT
The classical V-cycle methodology for the design of embedded automotive systems is typically implemented by a sequence of steps, from a functional specification down to the implementation at the programming level with the support of an RTOS. The validation of the design is a complex task that consists of analyzing and verifying by testing both functional and non-functional requirements. An important subset of non-functional requirements consists of timing constraints. Implementation must be checked against any violation of the latency and schedulability constraints; otherwise the functionality of the entire system could be severely compromised. Unfortunately, even in state-of-the-art processes, this step is not supported by adequate methods and tools. Subsequently,  the process is error-prone and subject to implementation errors, and it is very  difficult to generate derivative designs.
In this paper, we propose the use of real-time scheduling theory as a formal underpinning for a design process in which the timing behavior is considered from the earliest phases of the development.
To support the designer in this phase, we have built the RT-Druid design environment, which extends the scope of traditional (and existing) schedulability and timing analysis tools in many directions. First, RT-Druid captures the mapping of the functional components of the system to the concurrent threads implementing them, and to the hardware/software platform, allowing one to precisely trace such design decisions as the allocation of functions to a thread, and to identify potential problems in thread scheduling, communication and synchronization. Second, RT-Druid provides schedulability analysis together with sensitivity analysis, showing how variations of the thread parameters affect the response times and the schedulability of the system. Finally, RT-Druid provides support for application modes to analyze systems with dynamic workloads.
The RT-Druid design environment is integrated into the Eclipse open development framework and allows easy integration with third party tools. It supports the OSEK/VDX standard with import/export of OIL specifications and the generation of configuration code for Evidence’s ERIKA Enterprise RTOS.

Evidence Contact:

 Paolo Gai

Phone: +39 0587 274823

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