Training course on

Real-Time Systems for Microcontrollers:
OSEK Standard and experiments on microcontroller devices

Location

RETIS Laboratory, Scuola Superiore Sant'Anna, Pisa, Italy

Date

March 26-28, 2007

Course program

Day 1 - March, 26^th

Morning (Giorgio Buttazzo)

Scheduling analysis of real-time systems

• Introduction
• Rate Monotonic and Deadline Monotonic
• Response time analysis
• Priority Inheritance
• Stack Resource Policy

Afternoon (Paolo Gai)

Microcontrollers for embedded applications

• Features and characteristics
• Design targeted to small size

Internals of OSEK compliant kernels

• Differences from a general purpose OS (e.g., Linux)
• Stack sharing
• Immediate Priority Ceiling, and Stack Resource Policy (SRP)
• Preemption thresholding
• Implementation of shared stacks
• Optimization of stack usage

The OSEK/VDX standard (First Part)

• OSEK OS: details about the standard description of primitives
• OSEK OIL: details and examples
• OSEK ORTI: details and examples

Practical examples (First part)

• Using the Altera Nios II platform
• Using the Lauterbach Trace32 tracer
• Boot techniques for microcontrollers

Day 2 - March, 27^th

Morning (Paolo Gai)

The OSEK/VDX standard (Second part)

• OSEK OS: details about the standard description of primitives
• OSEK OIL: details and examples
• OSEK ORTI: details and examples

Practical examples (Second part)

• Using the Altera Nios II platform
• Using the Lauterbach Trace32 tracer
• Boot techniques for microcontrollers

A brief overview on the following standards

• OSEK COM
• OSEK NM
• OSEKTime
• FT-COM
• HIS
• AUTOSAR
• ProtectedOSEK

I/O management e structure of microcontroller drivers

Introduction to the techniques employed by microcontrollers for interfacing with external devices, including typical driver architecture and structure.

Afternoon (Paolo Gai)

ERIKA Enterprise Basic GPL for Microchip dsPIC (R) DSC

• Characteristics and features
• Programming, using and building projects
• Debug a project

Day 3 - March, 28^th

Morning (Simone Mannori)

Automatic generation of control applications

Automatic generation of control applications for Microchip dsPIC (R) DSC using Scilab/Scicos.

Afternoon

Examples and practice about all the presented topics.

Teachers

• Paolo Gai (Evidence Srl)
• Giorgio Buttazzo (Scuola Superiore Sant'Anna)
• Simone Mannori (INRIA, FR)

Lab Assistants

• Tullio Facchinetti (University of Pavia)
• Mauro Marinoni (University of Pavia)
• Gianluca Franchino (University of Pavia)

Time Table

Monday, March 26

• 08:15 - Start registration
• 08:50 - Welcome
• 09:00 - Lessons (Giorgio Buttazzo)
• 11:00 - Coffee break
• 11:15 - Lessons (Giorgio Buttazzo)
• 13:00 - Lunch
• 14:30 - Lessons (Paolo Gai)
• 16:15 - Break
• 16:30 - Lessons (Paolo Gai)
• 18:00 - End of lessons

Tuesday, March 27

• 09:00 - Lessons (Paolo Gai)
• 11:00 - Coffee break
• 11:15 - Lessons (Paolo Gai)
• 13:00 - Lunch
• 14:30 - Lessons (Paolo Gai)
• 16:15 - Break
• 16:30 - Lessons (Paolo Gai)
• 18:00 - End of lessons
• 19:30 - Meeting at the entrance of the RETIS lab for the Social dinner at Ristorante "Le Arcate"

Wednesday, March 28

• 09:00 - Lessons (Simone Mannori)
• 11:00 - Coffee break
• 11:15 - Lessons (Simone Mannori)
• 13:00 - Lunch
• 14:30 - Lessons (Simone Mannori)
• 17:00 - End of lessons

Subscription and accomodation

Subscription page

Accomodation page

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